Sumador de 2 bits
Sumador de 2 bits
entity sumadorde2bitscomponentes is
Port ( a : in STD_LOGIC;
a1 :
in STD_LOGIC;
b : in STD_LOGIC;
b1 :
in STD_LOGIC;
s :
out STD_LOGIC;
s1 :
out STD_LOGIC;
c1 :
out STD_LOGIC);
end sumadorde2bitscomponentes;
architecture Behavioral of sumadorde2bitscomponentes is
component medio_sumador is
Port ( a : in STD_LOGIC;
b : in STD_LOGIC;
c :
out STD_LOGIC;
s: out STD_LOGIC);
end component;
component sumadorcompleto is
Port ( a : in STD_LOGIC;
b : in STD_LOGIC;
cin :
in STD_LOGIC;
s1 :
out STD_LOGIC;
cout :
out STD_LOGIC);
end component;
SIGNAL cx :STD_LOGIC;
begin
U0: medio_sumador PORT MAP (a, b, s, cx);
U1: sumadorcompleto PORT MAP (a1, b1, cx, s1,c1);
end Behavioral;
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